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Joined September 2013
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Test Struggles To Keep Pace With AI
semiengineering.com/test-str…
Rapidly changing workloads, more test insertions, and fragmented data complicate chip testing.
#semiconductor #ATE #semiconductortest @pdf_solutions @Advantest_ATE @Teradyneinc @siemenssoftware #Vinci #agenticAI
Special Report:
Existing inspection tools struggle to capture defects, especially those hidden at the bond interface. semiengineering.com/shrinkin…
#hybridbonding #semiconductor
Memory In Physical AI youtu.be/68oMarzN2xI?si=iFHm… via @YouTube
LPDDR6 becomes an essential ingredient as intelligence moves into autonomous and mobile edge systems.
#LPDDR6 #HBM @Cadence #SOCAMM #cache
#edge #semiconductor
Semiconductor Engineering retweeted
Latest: HBM smuggling into China; Nvidia H200s held in Hong Kong; Micron pauses Taiwan fab; Samsung expands HBM base-die capacity; Bosch chip division; Marvell-Lumentum deal draws scrutiny; more acquisitions, market reports and earnings
semiengineering.com/chip-ind…
#semiconductor
Compression can shrink AI models, but efficient edge deployment starts with matching the architecture to the workload and hardware limits.
semiengineering.com/fitting-…
#edgeAI #edge #physicalAI #AImodels
Semiconductor Engineering retweeted
College Grads And AI
Computer science majors may be in an awkward space; EE grads are fine for now. semiengineering.com/college-…
#AgenticAI #engineering #workforce #EEeduction @AlphaDesignAI @Cadence @Synopsys @unisouthampton #llmdaai
Latest: HBM smuggling into China; Nvidia H200s held in Hong Kong; Micron pauses Taiwan fab; Samsung expands HBM base-die capacity; Bosch chip division; Marvell-Lumentum deal draws scrutiny; more acquisitions, market reports and earnings
semiengineering.com/chip-ind…
#semiconductor
College Grads And AI
Computer science majors may be in an awkward space; EE grads are fine for now. semiengineering.com/college-…
#AgenticAI #engineering #workforce #EEeduction @AlphaDesignAI @Cadence @Synopsys @unisouthampton #llmdaai
Semiconductor Engineering retweeted
Advanced packaging requires models to cross company boundaries without exposing proprietary processes, but hiding too much can make the prediction break down.
semiengineering.com/how-much…
#semiconductor #advancedpackaging
Shared resources, a mix of tools running at different speeds, and multiple dies are adding new challenges for design teams.
youtu.be/lkPX3lINOX4?si=YKPY…
#chiplets #CXK #PCIe #simulation #semiconductor
Semiconductor Engineering retweeted
Rise in complexity is pushing engineers to validate hardware, software, and physical constraints earlier in the design flow, but fragmented workflows make that difficult.
semiengineering.com/shift-le…
#semiEDA @SilvacoGroup @axiomise @Synopsys #HiveWare #semiconductor #verification
Semiconductor Engineering retweeted
Advanced packaging, photonics, test, and AI are increasingly intertwined; very different conversations ahead. Big shifts seen at SEMICON West
semiengineering.com/chip-sca…
#semiconductor
Technology is only useful if it improves an existing methodology. Property generation is still refining that goal, but in the long term it could be very useful.
semiengineering.com/auto-gen…
#semiEDA #verification #RAG #AI
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Semiconductor Engineering retweeted
New technical papers recently added to Semiconductor Engineering’s library
semiengineering.com/chip-ind…
#semiconductor #DRAM #CFET #HBM
#EUVlithography #photonics #CIM
Rise in complexity is pushing engineers to validate hardware, software, and physical constraints earlier in the design flow, but fragmented workflows make that difficult.
semiengineering.com/shift-le…
#semiEDA @SilvacoGroup @axiomise @Synopsys #HiveWare #semiconductor #verification
Semiconductor Engineering retweeted
Latest: HBM shortages threaten AI expansion; TSMC weighs price hikes; adv. packaging ramps; domain-specialized AI models; Infineon & UMC boost fab investments; Intel’s quantum move; Lam & imec advance 3D integration; Google expands TPUs; CPU benchmarking semiengineering.com/chip-ind…
New technical papers recently added to Semiconductor Engineering’s library
semiengineering.com/chip-ind…
#semiconductor #DRAM #CFET #HBM
#EUVlithography #photonics #CIM
Semiconductor Engineering retweeted
Advanced packaging growth and capacity constraints are pushing more onto OSATs.
semiengineering.com/foundrie…
#semiconductor #OSAT #foundries
Latest: HBM shortages threaten AI expansion; TSMC weighs price hikes; adv. packaging ramps; domain-specialized AI models; Infineon & UMC boost fab investments; Intel’s quantum move; Lam & imec advance 3D integration; Google expands TPUs; CPU benchmarking semiengineering.com/chip-ind…
Rethinking Shift Left In Chip Design semiengineering.com/rethinki…
Is it better to do everything earlier in the flow, or should design be more flexible and iterative?
#semiEDA #chipdesign @SilvacoGroup @axiomise
#Hiveware @Synopsys #shiftleft #semiconductor
